VGA connectors pinouts

Categories:  Electronic
Labels:  pinout, connector

There are at least four versions of the VGA connector, which are the three-row 15 pin DE-15 (also called mini sub D15) in original and DDC2 pinouts, a less featureful and far less common 9-pin VGA, and a Mini-VGA used for laptops. The image and below table are the newer 15-pin VGA VESA DDC2 connector pinout.

VGA DDC2 connector pinout:

Pin Name Dir Description
1 RED --> Red Video (75 ohm, 0.7 V p-p)
2 GREEN --> Green Video (75 ohm, 0.7 V p-p)
3 BLUE --> Blue Video (75 ohm, 0.7 V p-p)
5 GND --- Ground
6 RGND --- Red Ground
7 GGND --- Green Ground
8 BGND --- Blue Ground
9 KEY - Key (No pin) / Optional +5V output from graphics card
10 SGND --- Sync Ground
11 ID0 <-- Monitor ID Bit 0 (optional)
12 SDA <-- I2C bidirectional data line 
13 HSYNC or CSYNC --> Horizontal Sync (or Composite Sync)
14 VSYNC --> Vertical Sync which works also as data clock
15 SCL <-- I2C data clock in DDC2, Monitor ID3 in DDC1

Note: Direction is Computer relative Monitor. All VGA pinout signals except R, G, B are TTL level signals.

The basic VGA display modes of 80x25 character mode and 640x480 in graphics mode are still supported by all modern graphic cards, independent of the extended modes supported by these cards.

VGA video specifications are:

  • 256 KB Video RAM .
  • 16-color and 256-color modes
  • 262,144-value color palette (six bits each for red, green, and blue)
  • Selectable 25.175 MHz or 28.322 MHz master clock
  • Maximum of 800 horizontal pixels
  • Maximum of 600 lines (Interlaced)
  • Refresh rates at up to 70 Hz
  • Vertical blank interrupt
  • Planar mode: up to 16 colors (4 bit planes)
  • Packed-pixel mode: 256 colors (Mode 13h)
  • Hardware smooth scrolling support
  • Some Raster Ops support
  • Barrel shifter
  • Split screen support
  • 0.7 V peak-to-peak
  • 75 ohm double-terminated impedance (18.7 mA – 13 mW)


VESA Display Data Channel is a method for integrating digital interface to VGA connector so as to enable the monitor and graphics card to communicate. The first version of the DDC standard was adopted in August 1994. It included the EDID 1.0 format and specified DDC1, DDC2B and DDC2Ab physical links. DDC version 2, introduced in 1996, split EDID into a separate standard and introduced the DDC2B+ protocol. DDC version 3, 1997, introduced the DDC2Bi protocol and support for VESA Plug and Display and Flat Panel Display Interface on separate device addresses. The DDC standard has been superseded by E-DDC in 1999. Extended display identification data (EDID) is a companion standard; it defines a compact binary file format describing the monitor's capabilities and supported graphics modes, stored in a read-only memory (EEPROM) chip programmed by the manufacturer of the monitor.

DDC1 allows the monitor to tell its parameters to the computer. When the VGA graphics card detects data on data-line it starts to read the data coming from the monitor synchronous to vertical sync pulse. Vertical sync pulse frequency can be increased up to 25 KHz for the time of the data transfer if a DDC1 compliant monitor is found (be sure not to send those high frequencies to non DDC1 monitors!).

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